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[VHDL-FPGA-Verilog] 2

Description: 图像分割，将运动图像从背景图像中提取出来。-Image segmentation, the moving image extracted from the background image.
Platform: | Size: 1024 | Author: 成语 | Hits:

[VHDL-FPGA-Verilog] median-filter

Description: 基于FPGA的图像中值滤波算法的优化及实现vhdl-中值滤波 利用VHDL语言实现三级流水线中值滤波-FPGA-based image filtering algorithm optimization and realization of vhdl-median filter using VHDL language three pipelined median filter
Platform: | Size: 1024 | Author: 站长 | Hits:

[VHDL-FPGA-Verilog] A-VLSI-PROGRESSIVE-CODING-FOR-WAVELET-BASED-IMAGE

Description: this fpga based vhdl coding and report for wavlet based image compression in vhdl -this is fpga based vhdl coding and report for wavlet based image compression in vhdl
Platform: | Size: 3546112 | Author: tejas | Hits:

[VHDL-FPGA-Verilog] VHDL-VGA

Description: 基于VHDL的VGA彩条信号显示控制器,实现将预置的图像或动画在VGA显示器上正确显示的功能。-Based on the color bar signal VHDL VGA display controller, to achieve the preset image or animation function correctly displayed on a VGA monitor
Platform: | Size: 4096 | Author: JACK | Hits:

[Other] VHDL-VERILOG_HDL

Description: 基于FPGA的视频图像采集系统的设计与实现的 ＣＣＤ 图像传 感器采集图像， 经 ＤＳＰ 处理后输出的 ＰＡＬ 制 数字视频信-FPGA based video image acquisition system design and implementation of the CCD image sensor sensor image acquisition, after the treatment by DSP output PAL for digital video.
Platform: | Size: 12288 | Author: 演的 | Hits:

[VHDL-FPGA-Verilog] wavelet-transform-based-image-compression

Description: vhdl code & document for wavelet based image compression using fpga
Platform: | Size: 236544 | Author: kamlesh | Hits:

[VHDL-FPGA-Verilog] Image-Enhancement

Description: VHDL实现图像增强的文件说明，内容详细-VHDL realization of image enhancement, file description, detailed
Platform: | Size: 112640 | Author: 迷呼虫 | Hits:

[VHDL-FPGA-Verilog] VHDL

Description: VGA图像显示控制器设计.基于VHDL描述的VGA显示控制器，通过FPGA控制CRT显示器显示色彩和图形。完成的功能包括64种纯色的显示、横向和纵向彩色条幅的显示以及正方形色块的运动与控制。-VGA image display controller design based on VHDL description of a VGA display controller, FPGA control CRT display color and graphics. Completed features include 64 kinds of solid color display, horizontal and vertical colored banners displayed and square patches of motion and control.
Platform: | Size: 958464 | Author: 李丛阳 | Hits:

[Software Engineering] Image-Compress-FPGA_DSP

Description: 比较详细的阐述了图像压缩的原理,并基于DSP和VHDL实现该系统,最后在FPGA上通过.-More detailed exposition of the principles of image compress, and VHDL-based implementation of the system, and finally in the FPGA.
Platform: | Size: 106496 | Author: LEI GUOWEI | Hits:

[VHDL-FPGA-Verilog] image-new

Description: this coding is very effectively used for the image compression technique in vhdl
Platform: | Size: 622592 | Author: bhuvaneshwari | Hits:

[e-language] BlobsDemo

Description: segmentation image vhdl
Platform: | Size: 6144 | Author: Ilyes | Hits:

[Special Effects] image-denoising

Description: 基于FPGA的图像降噪处理，用vhdl实现，对校验噪声有良好的效果。顶层文件是sram_1024_top.vhd，综合连线文件在DIME文件夹中，与FPGA通信的文件在C文件夹-FPGA based image denoising by vhdl, works well when dealing with salt and pepper noise,top level is sram_1024_top.vhd
Platform: | Size: 11258880 | Author: chi zhang | Hits:

[Other] Digital-Signal-and-Image-Processing-Using-MATLAB.

Description: MATLAB is one of several tools for working with mathematics. As an experienced programmer, I was skeptical at rst. Why should I learn another programming language when I could do the work in C/C++? The answer was simple: working with MATLAB is easier! Yes, there are some instances when one would want to use another language. A compiled program, such as one written in C++, will run faster than an interpreted MATLAB program (where each line is translated by the computer when the program is run). For hardware design, one might want to write a program in Verilog or VHDL, so that the program can be converted to a circuit.
Platform: | Size: 5274624 | Author: erhan | Hits:

[VHDL-FPGA-Verilog] vhdl

Description: 《数字信号处理的FPGA实现（第三版）》作者：U.Meyer-Baese 的配套源码，基于quartus9.0用VHDL编写，使用的cyclone ii。其中包含FIR IIR FFT等算法的实现，对学习图像处理很有帮助。- FPGA digital signal processing (third edition) Author: U.Meyer-Baese The matching source, based on quartus9.0 prepared using VHDL, the use of cyclone ii. Which includes FIR IIR FFT algorithm such as the realization of learning to image processing helpful.
Platform: | Size: 397312 | Author: 马博城 | Hits:

[Software Engineering] 0424

Description: Using high-order cumulants of MPSK signal modulation recognition, The final weight matrix is ??the filter coefficient, Including compression ratio, image restoration computing uptime and peak signal to noise ratio.
Platform: | Size: 4096 | Author: abwnqa | Hits:

[VHDL-FPGA-Verilog] CCD_Array

Description: Interface TCD1209DG with Altera FPGA and transfer image data to PC via USB using USB FX2 Slave FIFO mode, Only FPGA code included.
Platform: | Size: 3320832 | Author: muralidh | Hits:

[SCM] myqxr

Description: LFM pulse compression of the Matlab program, Including the final calculation of the compressed image peak signal to noise ratio and compression of the source, Achieve a grayscale image and further control for video surveillance.
Platform: | Size: 6144 | Author: quipangang | Hits:

[Embeded-SCM Develop] 2146

Description: It draws on principal component analysis algorithm (PCA), LZ complexity is reflected in a time sequence, Image optical flow calculation matlab program.
Platform: | Size: 6144 | Author: nengqeisui | Hits:

[VHDL-FPGA-Verilog] de2_build

Description: De2_build: It contains the FPGA configuration file of the comprehensive Nios II system in Section 16.10.2 and software image files for the DE2 board. These files can be used for quick demo or software development. Note that the files can only be used for the DE2 board. Detailed use is explained in the pdf file within the directory
Platform: | Size: 1405952 | Author: davido | Hits:

[VHDL-FPGA-Verilog] Image Steganography_VHDL

Description: Complete VHDL codes for Image Steganography project
Platform: | Size: 8864 | Author: gsrwork2017@gmail.com | Hits:
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